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» Power Efficient Mediaprocessors: Design Space Exploration
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FPL
2008
Springer
116views Hardware» more  FPL 2008»
14 years 11 months ago
Shared reconfigurable architectures for CMPS
This paper investigates reconfigurable architectures suitable for chip multiprocessors (CMPs). Prior research has established that augmenting a conventional processor with reconfi...
Matthew A. Watkins, Mark J. Cianchetti, David H. A...
ADAEUROPE
2005
Springer
15 years 3 months ago
The Application of Compile-Time Reflection to Software Fault Tolerance Using Ada 95
Transparent system support for software fault tolerance reduces performance in general and precludes application-specific optimizations in particular. In contrast, explicit support...
Patrick Rogers, Andy J. Wellings
MASCOTS
2003
14 years 11 months ago
Considering the Energy Consumption of Mobile Storage Alternatives
This paper is motivated by a simple question: what are the energy consumption characteristics of mobile storage alternatives? To answer this question, we are faced with a design s...
Fengzhou Zheng, Nitin Garg, Sumeet Sobti, Chi Zhan...
JUCS
2006
112views more  JUCS 2006»
14 years 9 months ago
A Multi-objective Genetic Approach to Mapping Problem on Network-on-Chip
Abstract: Advances in technology now make it possible to integrate hundreds of cores (e.g. general or special purpose processors, embedded memories, application specific components...
Giuseppe Ascia, Vincenzo Catania, Maurizio Palesi
ASAP
2008
IEEE
161views Hardware» more  ASAP 2008»
14 years 11 months ago
Configurable and scalable high throughput turbo decoder architecture for multiple 4G wireless standards
In this paper, we propose a novel multi-code turbo decoder architecture for 4G wireless systems. To support various 4G standards, a configurable multi-mode MAP (maximum a posterio...
Yang Sun, Yuming Zhu, Manish Goel, Joseph R. Caval...