1238 search results - page 209 / 248 » Power Efficient Processor Architecture and The Cell Processo... |
ANSS
2004
IEEE
15 years 3 months ago
2004
IEEE
To enable optimizations in memory access behavior of high performance applications, cache monitoring is a crucial process. Simulation of cache hardware is needed in order to allow...
105
click to vote
ARC
2006
Springer
15 years 3 months ago
2006
Springer
We introduce a new paradigm in the computer architecture referred to as Polymorphic Instruction Set Computers (PISC). This new paradigm, in difference to RISC/CISC, introduces hard...
JCP
2006
14 years 11 months ago
2006
Recently, mobile agents have been proposed for efficient data dissemination in sensor networks. In the traditional client/server-based computing architecture, data at multiple sour...
ASPDAC
2010
ACM
14 years 9 months ago
2010
ACM
- In this paper, we propose a novel and global A3MAP (Architecture-Aware Analytic Mapping) algorithm applied to NoC (Networks-on-Chip) based MPSoC (Multi-Processor System-on-Chip) ...
106
Voted
BCS
2008
15 years 1 months ago
2008
Despite over a century's study, the trigger mechanisms of cardiac arrhythmias are poorly understood. Even modern experimental methods do not provide sufficient temporal and s...