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SIGMETRICS
2000
ACM
111views Hardware» more  SIGMETRICS 2000»
14 years 11 months ago
AMVA techniques for high service time variability
Motivated by experience gained during the validation of a recent Approximate Mean Value Analysis (AMVA) model of modern shared memory architectures, this paper re-examines the &qu...
Derek L. Eager, Daniel J. Sorin, Mary K. Vernon
DAC
2002
ACM
16 years 17 days ago
Schedulability of event-driven code blocks in real-time embedded systems
Many real-time embedded systems involve a collection of independently executing event-driven code blocks, having hard real-time constraints. Tasks in many such systems, like netwo...
Samarjit Chakraborty, Thomas Erlebach, Simon K&uum...
VLSID
2008
IEEE
128views VLSI» more  VLSID 2008»
15 years 12 months ago
A Novel Approach to Compute Spatial Reuse in the Design of Custom Instructions
In the automatic design of custom instruction set processors, there can be a very large set of potential custom instructions, from which a few instructions are required to be chos...
Nagaraju Pothineni, Anshul Kumar, Kolin Paul
HPCA
2007
IEEE
15 years 12 months ago
Evaluating MapReduce for Multi-core and Multiprocessor Systems
This paper evaluates the suitability of the MapReduce model for multi-core and multi-processor systems. MapReduce was created by Google for application development on data-centers...
Colby Ranger, Ramanan Raghuraman, Arun Penmetsa, G...
ISCAS
2007
IEEE
96views Hardware» more  ISCAS 2007»
15 years 5 months ago
Novel High-Speed Redundant Binary to Binary converter using Prefix Networks
— Fast addition and multiplication are of paramount importance in many arithmetic circuits and processors. The use of redundant number system for efficient implementation of thes...
Sreehari Veeramachaneni, Kirthi M. Krishna, Lingam...