1238 search results - page 222 / 248 » Power Efficient Processor Architecture and The Cell Processo... |
HIPEAC
2009
Springer
15 years 3 months ago
2009
Springer
Abstract. Exposing more instruction-level parallelism in out-of-order superscalar processors requires increasing the number of dynamic in-flight instructions. However, large instru...
106
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HIPC
2000
Springer
15 years 3 months ago
2000
Springer
Many scientific applications manipulate large amount of data and, therefore, are parallelized on high-performance computing systems to take advantage of their computational power a...
AHS
2007
IEEE
14 years 11 months ago
2007
IEEE
Online incremental evolution for a complex high-speed pattern recognition architecture has been implemented on a Xilinx Virtex-II Pro FPGA. The fitness evaluation module is entir...
109
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DPD
2006
14 years 11 months ago
2006
Contemporary long-term storage devices feature powerful embedded processors and sizeable memory buffers. Active Storage Devices (ASD) is the hard disk technology that makes use of ...
JPDC
2008
14 years 11 months ago
2008
Energy saving is becoming one of the major design issues in processor architectures with multiple functional units (FUs). Nested loops are usually the most critical part in multim...