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SBACPAD
2003
IEEE
138views Hardware» more  SBACPAD 2003»
15 years 4 months ago
Finite Difference Simulations of the Navier-Stokes Equations Using Parallel Distributed Computing
 This paper discusses the implementation of a numerical algorithm for simulating incompressible fluid flows based on the finite difference method and designed for parallel compu...
João Paulo De Angeli, Andréa M. P. V...
JSA
2008
94views more  JSA 2008»
14 years 11 months ago
Energy reduction through crosstalk avoidance coding in networks on chip
Commercial designs are currently integrating from 10 to 100 embedded processors in a single system on chip (SoC) and the number is likely to increase significantly in the near fut...
Partha Pratim Pande, Amlan Ganguly, Haibo Zhu, Cri...
COMPUTER
2002
103views more  COMPUTER 2002»
14 years 11 months ago
SimpleScalar: An Infrastructure for Computer System Modeling
tail defines the level of abstraction used to implement the model's components. A highly detailed model will faithfully simulate all aspects of machine operation, whether or n...
Todd M. Austin, Eric Larson, Dan Ernst
ISPAN
2005
IEEE
15 years 5 months ago
Process Scheduling for the Parallel Desktop
Commodity hardware and software are growing increasingly more complex, with advances such as chip heterogeneity and specialization, deeper memory hierarchies, ne-grained power ma...
Eitan Frachtenberg
ISCA
2010
IEEE
205views Hardware» more  ISCA 2010»
15 years 4 months ago
The virtual write queue: coordinating DRAM and last-level cache policies
In computer architecture, caches have primarily been viewed as a means to hide memory latency from the CPU. Cache policies have focused on anticipating the CPU’s data needs, and...
Jeffrey Stuecheli, Dimitris Kaseridis, David Daly,...