Sciweavers

    1238 search results - page 22 / 248
    » Power Efficient Processor Architecture and The Cell Processo...
    Sort
    View
    IPPS
    2009
    IEEE
    143views Distributed And Parallel Com...» more  IPPS 2009»
    Understanding the design trade-offs among current multicore systems for numerical computations
    15 years 6 months ago
    Understanding the design trade-offs among current multicore systems for numerical computations
    Download  www.cc.gatech.edu
    In this paper, we empirically evaluate fundamental design trade-offs among the most recent multicore processors and accelerator technologies. Our primary aim is to aid application...
    Seunghwa Kang, David A. Bader, Richard W. Vuduc
    claim paper
    Read More »
    CASES
    2008
    ACM
    162views System Software» more  CASES 2008»
    Compiling custom instructions onto expression-grained reconfigurable architectures
    15 years 1 months ago
    Compiling custom instructions onto expression-grained reconfigurable architectures
    Download  www.cecs.uci.edu
    While customizable processors aim at combining the flexibility of general purpose processors with the speed and power advantages of custom circuits, commercially available process...
    Paolo Bonzini, Giovanni Ansaloni, Laura Pozzi
    claim paper
    Read More »
    DT
    2000
    51views more  DT 2000»
    Power-/Energy Efficient BIST Schemes for Processor Data Paths
    14 years 11 months ago
    Power-/Energy Efficient BIST Schemes for Processor Data Paths
    Download  dscal.di.uoa.gr
    Nektarios Kranitis, Dimitris Gizopoulos, Antonis M...
    claim paper
    Read More »
    ISLPED
    1996
    ACM
    143views Hardware» more  ISLPED 1996»
    Stage-skip pipeline: a low power processor architecture using a decoded instruction buffer
    15 years 3 months ago
    Stage-skip pipeline: a low power processor architecture using a decoded instruction buffer
    Download  www.cecs.uci.edu
    Mitsuru Hiraki, Raminder Singh Bajwa, Hirotsugu Ko...
    claim paper
    Read More »
    MICRO
    2007
    IEEE
    106views Hardware» more  MICRO 2007»
    Low-Power, High-Performance Architecture of the PWRficient Processor Family
    14 years 11 months ago
    Low-Power, High-Performance Architecture of the PWRficient Processor Family
    Download  www.hotchips.org
    Tse-Yu Yeh
    claim paper
    Read More »
    Explore & Download
    Proceedings Preprints Top 5 Ranked Papers Publications Books Software Tutorials Presentations Lectures Notes Datasets
    Productivity Tools
    International On-screen Keyboard Graphical Social Symbols OCR Text Recognition CSS3 Style Generator Web Page to PDF Web Page to Image PDF Split PDF Merge Latex Equation Editor Sci2ools
    Document Tools
    PDF to Text PDF to Postscript PDF to Thumbnails Excel to PDF Word to PDF Postscript to PDF PowerPoint to PDF Latex to Word Repair Corrupted PDF
    Image Tools
    JPG to PS JPG to PDF Extract Images from PDF Image Converter
    Sciweavers
    About Community Cookies Privacy Policy Terms of Use

    Copyright © Sciweavers LLC, 2009-2025, USA.