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113
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IEEEPACT
2007
IEEE
15 years 6 months ago
2007
IEEE
Many sorting algorithms have been studied in the past, but there are only a few algorithms that can effectively exploit both SIMD instructions and threadlevel parallelism. In this...
143
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HPCA
2006
IEEE
16 years 3 days ago
2006
IEEE
An integrated, hardware / software co-designed CISC processor is proposed and analyzed. The objectives are high performance and reduced complexity. Although the x86 ISA is targete...
123
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ISCA
1992
IEEE
15 years 3 months ago
1992
IEEE
In this paper, we propose a multithreaded processor architecture which improves machine throughput. In our processor architecture, instructions from different threads (not a singl...
VLSID
2003
IEEE
16 years 3 days ago
2003
IEEE
Control dominated embedded systems have to be designed for fast reaction to asynchronous external events occurring in the environment. Such systems must be able to perform signal ...
102
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CORR
2008
Springer
14 years 11 months ago
2008
Springer
On modern architectures, the performance of 32-bit operations is often at least twice as fast as the performance of 64-bit operations. By using a combination of 32-bit and 64-bit ...