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ISCA
1997
IEEE
93views Hardware» more  ISCA 1997»
15 years 3 months ago
The Energy Efficiency of IRAM Architectures
Portable systems demand energy efficiency in order to maximize battery life. IRAM architectures, which combine DRAM and a processor on the same chip in a DRAM process, are more en...
Richard Fromm, Stylianos Perissakis, Neal Cardwell...
SPAA
1990
ACM
15 years 3 months ago
Analysis of Multithreaded Architectures for Parallel Computing
Multithreading has been proposed as an architectural strategy for tolerating latency in multiprocessors and, through limited empirical studies, shown to offer promise. This paper ...
Rafael H. Saavedra-Barrera, David E. Culler, Thors...
ICPP
1991
IEEE
15 years 3 months ago
B-SYS: A 470-Processor Programmable Systolic Array
This paper presents an architecture for programmable systolic arrays that provides simple and e cient systolic communication. The Brown Systolic Array is a linear implementation o...
Richard Hughey, Daniel P. Lopresti
DAC
2002
ACM
16 years 22 days ago
Unlocking the design secrets of a 2.29 Gb/s Rijndael processor
This contribution describes the design and performance testing of an Advanced Encryption Standard (AES) compliant encryption chip that delivers 2.29 GB/s of encryption throughput ...
Patrick Schaumont, Henry Kuo, Ingrid Verbauwhede
IPPS
2010
IEEE
14 years 9 months ago
A simple thermal model for multi-core processors and its application to slack allocation
Abstract--Power density and heat density of multicore processor system are increasing exponentially with Moore's Law. High temperature on chip greatly affects its reliability,...
Zhe Wang, Sanjay Ranka