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HPCA
2009
IEEE
16 years 10 days ago
Blueshift: Designing processors for timing speculation from the ground up
Several recent processor designs have proposed to enhance performance by increasing the clock frequency to the point where timing faults occur, and by adding error-correcting supp...
Brian Greskamp, Lu Wan, Ulya R. Karpuzcu, Jeffrey ...
CATA
2004
15 years 1 months ago
The Instruction Execution Mechanism for Responsive Multithreaded Processor
This paper describes the instruction execution mechanism of Responsive Multithreaded (RMT) Processor for distributed real-time processing. The execution order of each thread is co...
Tstomu Itou, Nobuyuki Yamasaki
ICCD
2008
IEEE
194views Hardware» more  ICCD 2008»
15 years 8 months ago
Understanding performance, power and energy behavior in asymmetric multiprocessors
Abstract—Multiprocessor architectures are becoming popular in both desktop and mobile processors. Among multiprocessor architectures, asymmetric architectures show promise in sav...
Nagesh B. Lakshminarayana, Hyesoon Kim
DAC
2008
ACM
16 years 24 days ago
Run-time instruction set selection in a transmutable embedded processor
We are presenting a new concept of an application-specific processor that is capable of transmuting its instruction set according to non-predictive application behavior during run...
Jörg Henkel, Lars Bauer, Muhammad Shafique
JCP
2007
154views more  JCP 2007»
14 years 11 months ago
Partially Reconfigurable Vector Processor for Embedded Applications
—Embedded systems normally involve a combination of hardware and software resources designed to perform dedicated tasks. Such systems have widely crept into industrial control, a...
Muhammad Z. Hasan, Sotirios G. Ziavras