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CF
2007
ACM
15 years 3 months ago
Adaptive VP decay: making value predictors leakage-efficient designs for high performance processors
Energy-efficient microprocessor designs are one of the major concerns in both high performance and embedded processor domains. Furthermore, as process technology advances toward d...
Juan M. Cebrian, Juan L. Aragón, José...
CASES
2004
ACM
15 years 3 months ago
Scalable custom instructions identification for instruction-set extensible processors
Extensible processors allow addition of application-specific custom instructions to the core instruction set architecture. However, it is computationally expensive to automaticall...
Pan Yu, Tulika Mitra
MICRO
1998
IEEE
139views Hardware» more  MICRO 1998»
15 years 4 months ago
A Dynamic Multithreading Processor
We present an architecture that features dynamic multithreading execution of a single program. Threads are created automatically by hardware at procedure and loop boundaries and e...
Haitham Akkary, Michael A. Driscoll
LCTRTS
2007
Springer
15 years 6 months ago
Enabling compiler flow for embedded VLIW DSP processors with distributed register files
High-performance and low-power VLIW DSP processors are increasingly deployed on embedded devices to process video and multimedia applications. For reducing power and cost in desig...
Chung-Kai Chen, Ling-Hua Tseng, Shih-Chang Chen, Y...
ICCD
2008
IEEE
420views Hardware» more  ICCD 2008»
15 years 8 months ago
Frequency and voltage planning for multi-core processors under thermal constraints
— Clock frequency and transistor density increases have resulted in elevated chip temperatures. In order to meet temperature constraints while still exploiting the performance op...
Michael Kadin, Sherief Reda