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CODES
2007
IEEE
15 years 4 months ago
Performance improvement of block based NAND flash translation layer
With growing capacities of flash memories, an efficient layer to manage read and write access to flash is required. NFTL is a widely used block based flash translation layer de...
Siddharth Choudhuri, Tony Givargis
MICRO
2009
IEEE
134views Hardware» more  MICRO 2009»
15 years 4 months ago
A case for dynamic frequency tuning in on-chip networks
Performance and power are the first order design metrics for Network-on-Chips (NoCs) that have become the de-facto standard in providing scalable communication backbones for mult...
Asit K. Mishra, Reetuparna Das, Soumya Eachempati,...
ISVLSI
2008
IEEE
142views VLSI» more  ISVLSI 2008»
15 years 4 months ago
A Fuzzy Approach for Variation Aware Buffer Insertion and Driver Sizing
In nanometer regime, the effects of process variations are dominating circuit performance, power and reliability of circuits. Hence, it is important to properly manage variation e...
Venkataraman Mahalingam, Nagarajan Ranganathan
CIDR
2009
140views Algorithms» more  CIDR 2009»
14 years 10 months ago
Energy Efficiency: The New Holy Grail of Data Management Systems Research
Energy costs are quickly rising in large-scale data centers and are soon projected to overtake the cost of hardware. As a result, data center operators have recently started turni...
Stavros Harizopoulos, Mehul A. Shah, Justin Meza, ...
ICPP
2007
IEEE
15 years 4 months ago
RECN-IQ: A Cost-Effective Input-Queued Switch Architecture with Congestion Management
As the number of computing and storage nodes keeps increasing, the interconnection network is becoming a key element of many computing and communication systems, where the overall...
Gaspar Mora, Pedro Javier García, Jose Flic...