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TWC
2011
219views more  TWC 2011»
14 years 6 months ago
Utility-Optimal Multi-Pattern Reuse in Multi-Cell Networks
—Achieving sufficient spatial capacity gain through the use of small cells requires careful consideration of intercell interference (ICI) management via BS power coordination co...
Kyuho Son, Yung Yi, Song Chong
CP
2001
Springer
15 years 4 months ago
Fast Optimal Instruction Scheduling for Single-Issue Processors with Arbitrary Latencies
Instruction scheduling is one of the most important steps for improving the performance of object code produced by a compiler. The local instruction scheduling problem is to nd a m...
Peter van Beek, Kent D. Wilken
ESTIMEDIA
2008
Springer
15 years 1 months ago
A framework for memory-aware multimedia application mapping on chip-multiprocessors
The relentless increase in multimedia embedded system application requirements as well as improvements in IC design technology have motivated the deployment of chip multiprocessor ...
Luis Angel D. Bathen, Nikil D. Dutt, Sudeep Pasric...
ICC
2007
IEEE
15 years 6 months ago
Power Managed Packet Switching
— High power dissipation in packet switches and routers is fast turning into a key problem, owing to increasing line speeds and decreasing chip sizes. To address this issue, we i...
Aditya Dua, Benjamin Yolken, Nicholas Bambos
TVLSI
2010
14 years 6 months ago
LOPASS: A Low-Power Architectural Synthesis System for FPGAs With Interconnect Estimation and Optimization
In this paper, we present a low-power architectural synthesis system (LOPASS) for field-programmable gate-array (FPGA) designs with interconnect power estimation and optimization. ...
Deming Chen, Jason Cong, Yiping Fan, Lu Wan