111 search results - page 2 / 23 » Power Optimization in Current Mode Circuits |
91
Voted
DAC
2005
ACM
16 years 19 days ago
2005
ACM
- The large magnitude of supply/ground bounces, which arise from power mode transitions in power gating structures, may cause spurious transitions in a circuit. This can result in ...
112
click to vote
TVLSI
2010
14 years 6 months ago
2010
Abstract--An asynchronous high-speed wave-pipelined bit-serial link for on-chip communication is presented as an alternative to standard bit-parallel links. The link employs the di...
94
Voted
DATE
2008
IEEE
15 years 6 months ago
2008
IEEE
Sleep transistor insertion is one of today’s most promising and widely adopted solutions for controlling stand-by leakage power in nanometer circuits. Although single-cycle powe...
95
Voted
TVLSI
2008
14 years 11 months ago
2008
Subthreshold circuit designs have been demonstrated to be a successful alternative when ultra-low power consumption is paramount. However, the characteristics of MOS transistors in...
GLVLSI
2006
IEEE
15 years 5 months ago
2006
IEEE
A new circuit technique based on a single PMOS sleep transistor and a dual threshold voltage CMOS technology is proposed in this paper for simultaneously reducing subthreshold and...