36 search results - page 1 / 8 » Power Optimization of Interconnection Networks for Transport... |
CSREAESA
2006
13 years 10 months ago
2006
Transport triggered architecture (TTA) has been shown to provide an efficient way to design application specific instruction set processors. However, the interconnection network of...
DATE
2003
IEEE
14 years 2 months ago
2003
IEEE
Interconnect networks play a critical role in shared memory multiprocessor systems-on-chip (MPSoC) designs. MPSoC performance and power consumption are greatly affected by the pac...
ISLPED
2003
ACM
14 years 2 months ago
2003
ACM
Power will be the key limiter to system scalability as interconnection networks take up an increasingly significant portion of system power. In this paper, we propose an architec...
ICCAD
2002
IEEE
14 years 6 months ago
2002
IEEE
Abstract—Interconnects (wires, buffers, clock distribution networks, multiplexers and busses) consume a significant fraction of total circuit power. In this work, we demonstrat...
HPCA
2003
IEEE
14 years 9 months ago
2003
IEEE
Originally developed to connect processors and memories in multicomputers, prior research and design of interconnection networks have focused largely on performance. As these netw...