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PC
2008
142views Management» more  PC 2008»
14 years 9 months ago
Performance analysis challenges and framework for high-performance reconfigurable computing
Reconfigurable computing (RC) applications employing both microprocessors and FPGAs have potential for large speedup when compared with traditional (software) parallel application...
Seth Koehler, John Curreri, Alan D. George
77
Voted
ISSS
1997
IEEE
103views Hardware» more  ISSS 1997»
15 years 1 months ago
A Source-Level Dynamic Analysis Methodology and Tool for High-Level Synthesis
This paper presents a novel source-level dynamic analysis methodology and tool for High-Level Synthesis (HLS). It not only for the first time enables HLS to offer source-level de...
Chih-Tung Chen, Kayhan Küçük&cced...
WETICE
2000
IEEE
15 years 1 months ago
CollabLogger: A Tool for Visualizing Groups at Work
The CollabLogger is a visual tool that supports usability analyses of human-computer interaction in a team environment. Participants in our computer-mediated activity were engaged...
Emile L. Morse, Michelle Potts Steves
91
Voted
SCIENTOMETRICS
2010
158views more  SCIENTOMETRICS 2010»
14 years 8 months ago
Rete-netzwerk-red: analyzing and visualizing scholarly networks using the Network Workbench Tool
The enormous increase in digital scholarly data and computing power combined with recent advances in text mining, linguistics, network science, and scientometrics make it possible...
Katy Börner, Weixia Huang, Micah Linnemeier, ...
ERSA
2008
185views Hardware» more  ERSA 2008»
14 years 11 months ago
Design Framework for Partial Run-Time FPGA Reconfiguration
Partial reconfiguration (PR) reveals many opportunities for integration into FPGA design for potential system optimizations such as reduced area, increased performance, and increa...
Chris Conger, Ann Gordon-Ross, Alan D. George