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DATE
2010
IEEE
192views Hardware» more  DATE 2010»
15 years 4 months ago
PhoenixSim: A simulator for physical-layer analysis of chip-scale photonic interconnection networks
—Recent developments have shown the possibility of leveraging silicon nanophotonic technologies for chip-scale interconnection fabrics that deliver high bandwidth and power effi...
Johnnie Chan, Gilbert Hendry, Aleksandr Biberman, ...
VLSID
2004
IEEE
107views VLSI» more  VLSID 2004»
16 years 1 days ago
Performance Analysis of Inter Cluster Communication Methods in VLIW Architecture
With increasing demands for high performance by embedded systems, especially by digital signal processing applications, embedded processors must increase available instruction lev...
Sourabh Saluja, Anshul Kumar
CODES
2006
IEEE
15 years 5 months ago
Data reuse driven energy-aware MPSoC co-synthesis of memory and communication architecture for streaming applications
The memory subsystem of a complex multiprocessor systemson-chip (MPSoC) is an important contributor to the chip power consumption. The selection of memory architecture, as well as...
Ilya Issenin, Nikil Dutt
125
Voted
TCOS
2010
14 years 6 months ago
Green Secure Processors: Towards Power-Efficient Secure Processor Design
With the increasing wealth of digital information stored on computer systems today, security issues have become increasingly important. In addition to attacks targeting the softwar...
Siddhartha Chhabra, Yan Solihin
76
Voted
ASPDAC
2004
ACM
98views Hardware» more  ASPDAC 2004»
15 years 5 months ago
Enabling on-chip diversity through architectural communication design
- In this paper, we explore a new concept, called on-chip diversity, and introduce a design methodology for such emerging systems. Simply speaking, on-chip diversity means mixing d...
Tudor Dumitras, Sam Kerner, Radu Marculescu