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» Power and performance optimization at the system level
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ASPDAC
2004
ACM
89views Hardware» more  ASPDAC 2004»
15 years 1 months ago
Predictable design of low power systems by pre-implementation estimation and optimization
- Each year tens of billions of Dollars are wasted by the microelectronics industry because of missed deadlines and delayed design projects. These delays are partially due to desig...
Wolfgang Nebel
DATE
2006
IEEE
135views Hardware» more  DATE 2006»
15 years 3 months ago
FPGA architecture characterization for system level performance analysis
We present a modular and scalable approach for automatically extracting actual performance information from a set of FPGA-based architecture topologies. This information is used d...
Douglas Densmore, Adam Donlin, Alberto L. Sangiova...
ISLPED
2003
ACM
155views Hardware» more  ISLPED 2003»
15 years 2 months ago
Low-power high-level synthesis for FPGA architectures
This paper addresses two aspects of low-power design for FPGA circuits. First, we present an RT-level power estimator for FPGAs with consideration of wire length. The power estima...
Deming Chen, Jason Cong, Yiping Fan
ICDE
2010
IEEE
292views Database» more  ICDE 2010»
15 years 9 months ago
Exploring Power-Performance Tradeoffs in Database Systems
With the total energy consumption of computing systems increasing in a steep rate, much attention has been paid to the design of energy-efficient computing systems and applications...
Zichen Xu, Yi-Cheng Tu, Xiaorui Wang
ISCAS
2007
IEEE
103views Hardware» more  ISCAS 2007»
15 years 3 months ago
Multi-Vth Level Conversion Circuits for Multi-VDD Systems
— Employing multiple supply voltages (multi-VDD) is attractive for reducing the power consumption without sacrificing the speed of an integrated circuit (IC). In order to transfe...
Sherif A. Tawfik, Volkan Kursun