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» Power and performance optimization at the system level
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ICCAD
2001
IEEE
108views Hardware» more  ICCAD 2001»
16 years 3 months ago
Placement Driven Retiming with a Coupled Edge Timing Model
Retiming is a widely investigated technique for performance optimization. It performs powerful modifications on a circuit netlist. However, often it is not clear, whether the pred...
Ingmar Neumann, Wolfgang Kunz
CODES
2005
IEEE
15 years 11 months ago
SOMA: a tool for synthesizing and optimizing memory accesses in ASICs
Arbitrary memory dependencies and variable latency memory systems are major obstacles to the synthesis of large-scale ASIC systems in high-level synthesis. This paper presents SOM...
Girish Venkataramani, Tiberiu Chelcea, Seth Copen ...
194
Voted
VEE
2006
ACM
150views Virtualization» more  VEE 2006»
16 years 2 days ago
Evaluating fragment construction policies for SDT systems
Software Dynamic Translation (SDT) systems have been used for program instrumentation, dynamic optimization, security policy enforcement, intrusion detection, and many other uses....
Jason Hiser, Daniel Williams, Adrian Filipi, Jack ...
171
Voted
DAC
2006
ACM
16 years 3 days ago
Circuits for energy harvesting sensor signal processing
duce system weight and volume, increase operating lifetime, The recent explosion in capability of embedded and portable decrease maintenance costs, and open new frontiers for inele...
Rajeevan Amirtharajah, Justin Wenck, Jamie Collier...
ICDE
2005
IEEE
122views Database» more  ICDE 2005»
16 years 7 months ago
Uncovering Database Access Optimizations in the Middle Tier with TORPEDO
A popular architecture for enterprise applications is one of a stateless object-based server accessing persistent data through Object-Relational mapping software. The reported ben...
Bruce E. Martin