1850 search results - page 206 / 370 » Power and performance optimization at the system level |
142
Voted
ISCA
2005
IEEE
15 years 11 months ago
2005
IEEE
This paper examines the area, power, performance, and design issues for the on-chip interconnects on a chip multiprocessor, attempting to present a comprehensive view of a class o...
164
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NOMS
2010
IEEE
15 years 4 months ago
2010
IEEE
— In this paper we analyze the performance of a self optimizing algorithm for handover parameter control which adjusts the settings depending on the oscillations experienced betw...
147
Voted
DATE
2009
IEEE
16 years 27 days ago
2009
IEEE
—This paper presents a new two-levels page-based memory bus protection scheme. A trusted Operating System drives a hardware cryptographic unit and manages security contexts for e...
218
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ICRA
2010
IEEE
15 years 4 months ago
2010
IEEE
— The latency of a perception system is crucial for a robot performing interactive tasks in dynamic human environments. We present MOPED, a fast and scalable perception system fo...
122
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IJET
2006
15 years 6 months ago
2006
One of the primary goals of undergraduate studies programs is to promote the professional and personal growth and success of their students. First year students, however, often suf...