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» Power and performance optimization at the system level
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168
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ICRA
2010
IEEE
189views Robotics» more  ICRA 2010»
15 years 4 months ago
Affordable SLAM through the co-design of hardware and methodology
— Simultaneous localization and mapping (SLAM) is a prominent feature for autonomous robots operating in undefined environments. Applications areas such as consumer robotics app...
Stéphane Magnenat, Valentin Longchamp, Mich...
GLOBECOM
2009
IEEE
16 years 27 days ago
Carrier to Interference Ratio Analysis for the Shotgun Cellular System
—This paper analyzes the carrier-to-interference ratio of the so-called shotgun cellular system (SCS). In the SCS, basestations are placed randomly according to a two-dimensional...
Prasanna Madhusudhanan, Juan G. Restrepo, Youjian ...
153
Voted
IPPS
2009
IEEE
16 years 24 days ago
Handling OS jitter on multicore multithreaded systems
Various studies have shown that OS jitter can degrade parallel program performance considerably at large processor counts. Most sources of system jitter fall broadly into 5 catego...
Pradipta De, Vijay Mann, Umang Mittaly
GLVLSI
2007
IEEE
211views VLSI» more  GLVLSI 2007»
16 years 14 days ago
Multi-processor operating system emulation framework with thermal feedback for systems-on-chip
Multi-Processor System-On-Chip (MPSoC) can provide the performance levels required by high-end embedded applications. However, they do so at the price of an increasing power densi...
Salvatore Carta, Andrea Acquaviva, Pablo Garcia De...
153
Voted
CASES
2003
ACM
15 years 11 months ago
A low-power accelerator for the SPHINX 3 speech recognition system
Accurate real-time speech recognition is not currently possible in the mobile embedded space where the need for natural voice interfaces is clearly important. The continuous natur...
Binu K. Mathew, Al Davis, Zhen Fang