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» Power and performance optimization at the system level
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ISOLA
2004
Springer
15 years 11 months ago
Static Timing Analysis of Real-Time Operating System Code
Methods for Worst-Case Execution Time (WCET) analysis have been known for some time, and recently commercial tools have emerged. However, the technique has so far not been much use...
Daniel Sandell, Andreas Ermedahl, Jan Gustafsson, ...
BROADNETS
2005
IEEE
15 years 12 months ago
Multi-rate throughput optimization for wireless local area network anomaly problem
— Due to varying wireless channel conditions, the IEEE 802.11 wireless local area network (WLAN) standard supports multiple modulation types to accommodate the tradeoff between d...
Yu-Liang Kuo, Kun-Wei Lai, Frank Yeong-Sung Lin, Y...
FAST
2011
14 years 9 months ago
Cost Effective Storage using Extent Based Dynamic Tiering
Multi-tier systems that combine SSDs with SAS/FC and/or SATA disks mitigate the capital cost burden of SSDs, while benefiting from their superior I/O performance per unit cost an...
Jorge Guerra, Himabindu Pucha, Joseph S. Glider, W...
DATE
1997
IEEE
75views Hardware» more  DATE 1997»
15 years 10 months ago
Using constraint logic programming in memory synthesis for general purpose computers
In modern computer systems the performance is dominated by the memory performance. Currently, there is neither a systematic design methodology nor a tool for the design of memory ...
Renate Beckmann, Jürgen Herrmann
CODES
2006
IEEE
16 years 10 days ago
Data reuse driven energy-aware MPSoC co-synthesis of memory and communication architecture for streaming applications
The memory subsystem of a complex multiprocessor systemson-chip (MPSoC) is an important contributor to the chip power consumption. The selection of memory architecture, as well as...
Ilya Issenin, Nikil Dutt