1850 search results - page 22 / 370 » Power and performance optimization at the system level |
71
Voted
IEEEINTERACT
2003
IEEE
15 years 2 months ago
2003
IEEE
This paper examines the effect of compiler optimizations on the energy usage and power consumption of the Intel Pentium 4 processor. We measure the effects of different levels of ...
63
Voted
ISCAS
2003
IEEE
15 years 2 months ago
2003
IEEE
Optimal transceivers that minimize the transmission power for a given probability of error and transmission bit rate will be evaluated for ADSL applications. We will compare the p...
INFOCOM
2010
IEEE
14 years 8 months ago
2010
IEEE
—There exists a certain level of ambiguity regarding whether network coding can further improve download performance in P2P content distribution systems, as compared to commonly ...
DATE
2003
IEEE
15 years 2 months ago
2003
IEEE
A primary goal of high-level modeling is to efficiently explore a broad design space, converging on an optimal or near-optimal system architecture before moving to a more detaile...
109
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DAC
1995
ACM
15 years 1 months ago
1995
ACM
—We survey state-of-the-art optimization methods that target low power dissipation in VLSI circuits. Optimizations at the circuit, logic, architectural and system levels are cons...