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» Power and performance optimization at the system level
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TCAD
2008
114views more  TCAD 2008»
14 years 11 months ago
Three-Dimensional Chip-Multiprocessor Run-Time Thermal Management
Three-dimensional integration has the potential to improve the communication latency and integration density of chip-level multiprocessors (CMPs). However, the stacked highpower de...
Changyun Zhu, Zhenyu (Peter) Gu, Li Shang, Robert ...
DSD
2010
IEEE
161views Hardware» more  DSD 2010»
15 years 2 days ago
Design of Trace-Based Split Array Caches for Embedded Applications
—Since many embedded systems execute a predefined set of programs, tuning system components to application programs and data is the approach chosen by many design techniques to o...
Alice M. Tokarnia, Marina Tachibana
CDC
2010
IEEE
147views Control Systems» more  CDC 2010»
14 years 3 months ago
Partial pole placement with minimum norm controller
— The problem of placing an arbitrary subset (m) of the (n) closed loop eigenvalues of a nth order continuous time single input linear time invariant(LTI) system, using full stat...
Subashish Datta, Balarko Chaudhuri, Debraj Chakrab...
ICCAD
2007
IEEE
123views Hardware» more  ICCAD 2007»
15 years 8 months ago
Mapping model with inter-array memory sharing for multidimensional signal processing
Abstract – The storage requirements in data-intensive signal processing systems (including applications in video and image processing, artificial vision, medical imaging, real-t...
Ilie I. Luican, Hongwei Zhu, Florin Balasa
CDC
2008
IEEE
136views Control Systems» more  CDC 2008»
15 years 6 months ago
Estimation over heterogeneous sensor networks
Abstract— Design trade-offs between estimation performance, processing delay and communication cost for a sensor scheduling problem is discussed. We consider a heterogeneous sens...
Henrik Sandberg, Maben Rabi, Mikael Skoglund, Karl...