1850 search results - page 316 / 370 » Power and performance optimization at the system level |
107
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ICCAD
2009
IEEE
14 years 9 months ago
2009
IEEE
In a behavioral synthesis system, a typical approach used to guide the scheduler is to impose hard constraints on the relative timing between operations considering performance, a...
171
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SIGOPS
2011
14 years 6 months ago
2011
Heterogeneous processors that mix big high performance cores with small low power cores promise excellent single– threaded performance coupled with high multi–threaded through...
102
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LCTRTS
2007
Springer
15 years 6 months ago
2007
Springer
High-performance and low-power VLIW DSP processors are increasingly deployed on embedded devices to process video and multimedia applications. For reducing power and cost in desig...
113
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ATAL
2007
Springer
15 years 6 months ago
2007
Springer
Decentralized MDPs provide powerful models of interactions in multi-agent environments, but are often very difficult or even computationally infeasible to solve optimally. Here we...
104
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DSD
2002
IEEE
15 years 4 months ago
2002
IEEE
Continuing VLSI technology scaling raises several deep submicron (DSM) problems like relatively slow interconnect, power dissipation and distribution, and signal integrity. Those ...