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» Power and performance optimization at the system level
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TSP
2010
14 years 4 months ago
SNR estimation for multilevel constellations using higher-order moments
Abstract--The performance of existing moments-based nondata-aided (NDA) estimators of signal-to-noise ratio (SNR) in digital communication systems substantially degrades with multi...
Marcos Álvarez-Díaz, Roberto L&oacut...
KCAP
2011
ACM
14 years 18 days ago
An analysis of open information extraction based on semantic role labeling
Open Information Extraction extracts relations from text without requiring a pre-specified domain or vocabulary. While existing techniques have used only shallow syntactic featur...
Janara Christensen, Mausam, Stephen Soderland, Ore...
DAC
2005
ACM
15 years 10 months ago
User-perceived latency driven voltage scaling for interactive applications
Power has become a critical concern for battery-driven computing systems, on which many applications that are run are interactive. System-level voltage scaling techniques, such as...
Le Yan, Lin Zhong, Niraj K. Jha
ECBS
1996
IEEE
155views Hardware» more  ECBS 1996»
15 years 1 months ago
Model-Integrated Program Synthesis Environment
In this paper, it is shown that, through the use of Model-Integrated Program Synthesis MIPS, parallel real-time implementations of image processing data ows can be synthesized fro...
Janos Sztipanovits, Gabor Karsai, Hubertus Franke
HPCA
2009
IEEE
15 years 10 months ago
Design and evaluation of a hierarchical on-chip interconnect for next-generation CMPs
Performance and power consumption of an on-chip interconnect that forms the backbone of Chip Multiprocessors (CMPs), are directly influenced by the underlying network topology. Bo...
Reetuparna Das, Soumya Eachempati, Asit K. Mishra,...