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» Power and performance optimization at the system level
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ISCA
2010
IEEE
305views Hardware» more  ISCA 2010»
15 years 2 months ago
Rethinking DRAM design and organization for energy-constrained multi-cores
DRAM vendors have traditionally optimized the cost-perbit metric, often making design decisions that incur energy penalties. A prime example is the overfetch feature in DRAM, wher...
Aniruddha N. Udipi, Naveen Muralimanohar, Niladris...
IPPS
1997
IEEE
15 years 1 months ago
A Tool for On-line Visualization and Interactive Steering of Parallel HPC Applications
Tools for parallel systems today range from specification over debugging to performance analysis and more. Typically, they help the programmers of parallel algorithms from the ea...
Sabine Rathmayer
SIGMETRICS
2008
ACM
14 years 9 months ago
Scheduling despite inexact job-size information
Motivated by the optimality of Shortest Remaining Processing Time (SRPT) for mean response time, in recent years many computer systems have used the heuristic of "favoring sm...
Adam Wierman, Misja Nuyens
SIGMETRICS
2010
ACM
139views Hardware» more  SIGMETRICS 2010»
15 years 2 months ago
On the flow-level dynamics of a packet-switched network
: The packet is the fundamental unit of transportation in modern communication networks such as the Internet. Physical layer scheduling decisions are made at the level of packets, ...
Ciamac Cyrus Moallemi, Devavrat Shah
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MICRO
2002
IEEE
127views Hardware» more  MICRO 2002»
15 years 2 months ago
DELI: a new run-time control point
The Dynamic Execution Layer Interface (DELI) offers the following unique capability: it provides fine-grain control over the execution of programs, by allowing its clients to obse...
Giuseppe Desoli, Nikolay Mateev, Evelyn Duesterwal...