1850 search results - page 47 / 370 » Power and performance optimization at the system level |
98
Voted
ICCD
2006
IEEE
15 years 6 months ago
2006
IEEE
Technology trends are driving parallel on-chip architectures in the form of multi-processor systems-on-a-chip (MPSoCs) and chip multi-processors (CMPs). In these systems the incre...
EMSOFT
2004
Springer
15 years 3 months ago
2004
Springer
Basic retiming is an algorithm originally developed for hardware optimization. Software pipelining is a technique proposed to increase instruction-level parallelism for parallel p...
83
Voted
AVSS
2006
IEEE
15 years 3 months ago
2006
IEEE
We consider the problem of optimal power scheduling for the decentralized detection of a deterministic signal in an inhomogeneous wireless sensor network. The observation noise at...
ISLPED
2005
ACM
15 years 3 months ago
2005
ACM
This work first presents an analytical repeater insertion method which optimizes power under delay constraint for a single net. This method finds the optimal repeater insertion ...
FPL
2005
Springer
15 years 3 months ago
2005
Springer
This article presents a power estimation tool integrated with an FPGA design flow. It is able to estimate total and individual-node average power consumption for combinational blo...