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» Power and performance optimization at the system level
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TVLSI
2008
144views more  TVLSI 2008»
14 years 9 months ago
Reconfigurable Hardware for High-Security/ High-Performance Embedded Systems: The SAFES Perspective
Abstract--Embedded systems present significant security challenges due to their limited resources and power constraints. This paper focuses on the issues of building secure embedde...
Guy Gogniat, Tilman Wolf, Wayne P. Burleson, Jean-...
AMAST
2008
Springer
14 years 11 months ago
System Demonstration of Spiral: Generator for High-Performance Linear Transform Libraries
We demonstrate Spiral, a domain-specific library generation system. Spiral generates high performance source code for linear transforms (such as the discrete Fourier transform and ...
Yevgen Voronenko, Franz Franchetti, Fréd&ea...
DAC
2004
ACM
15 years 10 months ago
FPGA power reduction using configurable dual-Vdd
Power optimization is of growing importance for FPGAs in nanometer technologies. Considering dual-Vdd technique, we show that configurable power supply is required to obtain a sat...
Fei Li, Yan Lin, Lei He
ICCAD
2007
IEEE
119views Hardware» more  ICCAD 2007»
14 years 11 months ago
IntSim: A CAD tool for optimization of multilevel interconnect networks
– Interconnect issues are becoming increasingly important for ULSI systems. IntSim, an interconnect CAD tool, has been developed to obtain pitches of different wiring levels and ...
Deepak C. Sekar, Azad Naeemi, Reza Sarvari, Jeffre...
EMSOFT
2010
Springer
14 years 7 months ago
Energy-aware packet and task co-scheduling for embedded systems
A crucial objective in battery operated embedded systems is to work under the minimal power consumption that provides a desired level of performance. Dynamic Voltage Scaling (DVS)...
Luca Santinelli, Mauro Marinoni, Francesco Prosper...