Sciweavers

1850 search results - page 74 / 370
» Power and performance optimization at the system level
Sort
View
DATE
2006
IEEE
82views Hardware» more  DATE 2006»
15 years 3 months ago
Power-aware compilation for embedded processors with dynamic voltage scaling and adaptive body biasing capabilities
Traditionally, active power has been the primary source of power dissipation in CMOS designs. Although, leakage power is becoming increasingly more important as technology feature...
Po-Kuan Huang, Soheil Ghiasi
IJCSA
2008
117views more  IJCSA 2008»
14 years 9 months ago
Altivec Vector Unit Customization for Embedded Systems
Vector extensions for general purpose processors are an efficient feature to address the growing performance demand of multimedia and computer vision applications. Embedded proces...
Tarik Saidani, Joel Falcou, Lionel Lacassagne, Sam...
TVCG
2012
182views Hardware» more  TVCG 2012»
13 years 6 days ago
ISP: An Optimal Out-of-Core Image-Set Processing Streaming Architecture for Parallel Heterogeneous Systems
—Image population analysis is the class of statistical methods that plays a central role in understanding the development, evolution and disease of a population. However, these t...
Linh K. Ha, Jens Krüger, João Luiz Dih...
CDC
2010
IEEE
14 years 4 months ago
Market-based control mechanisms for electric power demand response
We propose a settlement mechanism for optimally scheduling real time electricity consumption which is suitable for an automated demand response control system. Our proposed settlem...
Anthony Papavasiliou, Haitham Hindi, Daniel Greene
CODES
2003
IEEE
15 years 3 months ago
RTOS scheduling in transaction level models
the level of abstraction in system design promises to enable faster exploration of the design space at early stages. While scheduling decision for embedded software has great impa...
Haobo Yu, Andreas Gerstlauer, Daniel Gajski