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» Power and performance optimization at the system level
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CASES
2007
ACM
15 years 1 months ago
A low power front-end for embedded processors using a block-aware instruction set
Energy, power, and area efficiency are critical design concerns for embedded processors. Much of the energy of a typical embedded processor is consumed in the front-end since inst...
Ahmad Zmily, Christos Kozyrakis
CCGRID
2003
IEEE
15 years 3 months ago
Performability Evaluation of Networked Storage Systems Using N-SPEK
This paper introduces a new benchmark tool for evaluating performance and availability (performability) of networked storage systems, specifically storage area network (SAN) that...
Ming Zhang, Qing Yang, Xubin He
ISQED
2007
IEEE
127views Hardware» more  ISQED 2007»
15 years 4 months ago
Thermal vs Energy Optimization for DVFS-Enabled Processors in Embedded Systems
— In the past, dynamic voltage and frequency scaling (DVFS) has been widely used for power and energy optimization in embedded system design. As thermal issues become increasingl...
Yongpan Liu, Huazhong Yang, Robert P. Dick, Hui Wa...
ICS
2005
Tsinghua U.
15 years 3 months ago
Disk layout optimization for reducing energy consumption
Excessive power consumption is becoming a major barrier to extracting the maximum performance from high-performance parallel systems. Therefore, techniques oriented towards reduci...
Seung Woo Son, Guangyu Chen, Mahmut T. Kandemir
GLOBECOM
2006
IEEE
15 years 3 months ago
Optimal Codeword Design for Precoded UWB (PUWB) Systems
Abstract— A precoding technique applied to symbols transmitted in an ultra-wideband (UWB) system was proposed in [1], which can concentrate the signal power at the receiver to fa...
Yu-Hao Chang, Shang-Ho Tsai, Xiaoli Yu, C. C. Jay ...