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RTSS
2003
IEEE
15 years 3 months ago
Data Caches in Multitasking Hard Real-Time Systems
Data caches are essential in modern processors, bridging the widening gap between main memory and processor speeds. However, they yield very complex performance models, which make...
Xavier Vera, Björn Lisper, Jingling Xue
ICCD
2005
IEEE
176views Hardware» more  ICCD 2005»
15 years 6 months ago
A Formal Framework for Modeling and Analysis of System-Level Dynamic Power Management
Recent advances in Dynamic Power Management (DPM) techniques have resulted in designs that support a rich set of power management options, both at the hardware and software levels...
Shrirang M. Yardi, Karthik Channakeshava, Michael ...
HPCA
2009
IEEE
15 years 10 months ago
Design and implementation of software-managed caches for multicores with local memory
Heterogeneous multicores, such as Cell BE processors and GPGPUs, typically do not have caches for their accelerator cores because coherence traffic, cache misses, and latencies fr...
Sangmin Seo, Jaejin Lee, Zehra Sura
GLOBECOM
2010
IEEE
14 years 8 months ago
Cache-Based Scalable Deep Packet Inspection with Predictive Automaton
Abstract--Regular expression (Regex) becomes the standard signature language for security and application detection. Deterministic finite automata (DFAs) are widely used to perform...
Yi Tang, Junchen Jiang, Xiaofei Wang, Yi Wang, Bin...
DATE
2007
IEEE
74views Hardware» more  DATE 2007»
15 years 4 months ago
Joint consideration of fault-tolerance, energy-efficiency and performance in on-chip networks
High reliability against noise, low energy consumption and high performance are key objectives in the design of on-chip networks. Recently some researchers have considered the var...
Alireza Ejlali, Bashir M. Al-Hashimi, Paul M. Rosi...