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» Power efficient encoding techniques for off-chip data buses
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CODES
2006
IEEE
15 years 3 months ago
Data reuse driven energy-aware MPSoC co-synthesis of memory and communication architecture for streaming applications
The memory subsystem of a complex multiprocessor systemson-chip (MPSoC) is an important contributor to the chip power consumption. The selection of memory architecture, as well as...
Ilya Issenin, Nikil Dutt
AINA
2010
IEEE
15 years 2 months ago
Encoding and Compression for the Devices Profile for Web Services
—Most solutions for Wireless Sensor Networks (WSN) come equipped with their own architectural concepts which raise the problem of possible incompatibility of computer networks an...
Guido Moritz, Dirk Timmermann, Regina Stoll, Frank...
GLVLSI
2006
IEEE
152views VLSI» more  GLVLSI 2006»
15 years 3 months ago
2 Gbps SerDes design based on IBM Cu-11 (130nm) standard cell technology
This paper introduces a standard cell based design for a Serializer and Deserializer (SerDes) communication link. The proposed design is area, power and design time efficient as c...
Rashed Zafar Bhatti, Monty Denneau, Jeff Draper
SIGMOD
2006
ACM
122views Database» more  SIGMOD 2006»
15 years 9 months ago
MonetDB/XQuery: a fast XQuery processor powered by a relational engine
Relational XQuery systems try to re-use mature relational data management infrastructures to create fast and scalable XML database technology. This paper describes the main featur...
Peter A. Boncz, Torsten Grust, Maurice van Keulen,...
ICDE
2009
IEEE
170views Database» more  ICDE 2009»
15 years 11 months ago
Semantics of Ranking Queries for Probabilistic Data and Expected Ranks
Abstract-- When dealing with massive quantities of data, topk queries are a powerful technique for returning only the k most relevant tuples for inspection, based on a scoring func...
Graham Cormode, Feifei Li, Ke Yi