3 search results - page 1 / 1 » Power estimation for a submicron CMOS inverter driving a CRC... |
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Voted
GLVLSI
2000
IEEE
15 years 2 months ago
2000
IEEE
Ï ÔÖ × ÒØ Ò Ò ÐÝØ Ð ÜÔÖ ×× ÓÒ ÓÖ Ø Ú ÐÙ Ø ÓÒ Ó Ø × ÓÖع Ö Ù Ø ÔÓÛ Ö ×× Ô Ø ÓÒ Ò ÅÇË ÒÚ ÖØ Ö Ö Ú¹ Ò Ê ÒØ Ö ÓÒÒ ...
VLSID
2002
IEEE
15 years 10 months ago
2002
IEEE
Predictive delay analysis is presented for a representative CMOS inverter with submicron device size using PREDICTMOS MOSFET model. As against SPICE, which adopts a time consuming...
GLVLSI
2003
IEEE
15 years 3 months ago
2003
IEEE
—Interconnect inductance introduces a shielding effect which decreases the effective capacitance seen by the driver of a circuit, reducing the gate delay. A model of the effectiv...