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DAC
2005
ACM
16 years 17 days ago
Hardware speech recognition for user interfaces in low cost, low power devices
We propose a system architecture for real-time hardware speech recognition on low-cost, power-constrained devices. The system is intended to support real-time speech-based user in...
Sergiu Nedevschi, Rabin K. Patra, Eric A. Brewer
JCP
2008
216views more  JCP 2008»
14 years 11 months ago
Design Overview Of Processor Based Implantable Pacemaker
Implantable pacemaker is a battery operated real time embedded system, which includes software/hardware codesign strategy. As it is placed within the heart by surgery, battery life...
Santosh D. Chede, Kishore D. Kulat
CODES
2005
IEEE
15 years 5 months ago
Power-smart system-on-chip architecture for embedded cryptosystems
In embedded cryptosystems, sensitive information can leak via timing, power, and electromagnetic channels. We introduce a novel power-smart system-on-chip architecture that provid...
Radu Muresan, Haleh Vahedi, Y. Zhanrong, Stefano G...
CSREAESA
2006
15 years 1 months ago
Fast Run-Time Power Monitoring Methodology for Embedded Systems
Traditional simulation-based energy estimation is not practical because the simulation time has increased from minutes and hours and weeks. Therefore, simulation assisted by speci...
Kuei-Chung Chang, Jih-Sheng Shen, Tien-Fu Chen
DATE
2007
IEEE
85views Hardware» more  DATE 2007»
15 years 6 months ago
Low-power warp processor for power efficient high-performance embedded systems
Researchers previously proposed warp processors, a novel architecture capable of transparently optimizing an executing application by dynamically re-implementing critical kernels ...
Roman L. Lysecky