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CODES
2001
IEEE
15 years 1 months ago
Towards effective embedded processors in codesigns: customizable partitioned caches
This paper explores an application-specific customization technique for the data cache, one of the foremost area/power consuming and performance determining microarchitectural fea...
Peter Petrov, Alex Orailoglu
DATE
2005
IEEE
154views Hardware» more  DATE 2005»
15 years 3 months ago
A Time Slice Based Scheduler Model for System Level Design
Efficient evaluation of design choices, in terms of selection of algorithms to be implemented as hardware or software, and finding an optimal hw/sw design mix is an important re...
Luciano Lavagno, Claudio Passerone, Vishal Shah, Y...
GECCO
2004
Springer
136views Optimization» more  GECCO 2004»
15 years 2 months ago
System Level Hardware-Software Design Exploration with XCS
Abstract. The current trend in Embedded Systems (ES) design is moving towards the integration of increasingly complex applications on a single chip. An Embedded System has to satis...
Fabrizio Ferrandi, Pier Luca Lanzi, Donatella Sciu...
CODES
2007
IEEE
15 years 3 months ago
Power deregulation: eliminating off-chip voltage regulation circuitry from embedded systems
In battery-powered embedded systems, dedicated circuitry is used to convert stored energy into a form that can be directly used by processors. These power regulation devices seek ...
Seunghoon Kim, Robert P. Dick, Russ Joseph
ISLPED
2000
ACM
68views Hardware» more  ISLPED 2000»
15 years 1 months ago
Speeding up power estimation of embedded software
Power is increasingly becoming a design constraint for embedded systems. A processor is responsible for energy consumption on account of the software component of the embedded sys...
Akshaye Sama, J. F. M. Theeuwen, M. Balakrishnan