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ICCD
2006
IEEE
189views Hardware» more  ICCD 2006»
15 years 9 months ago
A Capacity Co-allocation Configurable Cache for Low Power Embedded Systems
— Traditional level-one instruction caches and data caches for embedded systems typically have the same capacities. Configurable caches either shut down a part of the cache to su...
Chuanjun Zhang
110
Voted
ISMVL
2005
IEEE
107views Hardware» more  ISMVL 2005»
15 years 6 months ago
Multiple-Valued Caches for Power-Efficient Embedded Systems
In this paper, we propose three novel cache models using Multiple-Valued Logic (MVL) paradigm to reduce the cache data storage area and cache energy consumption for embedded syste...
Emre Özer, Resit Sendag, David Gregg
74
Voted
DAC
2000
ACM
16 years 1 months ago
Influence of compiler optimizations on system power
Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary ...