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98
Voted
ISLPED
2005
ACM
103views Hardware» more  ISLPED 2005»
15 years 6 months ago
A non-uniform cache architecture for low power system design
This paper proposes a non-uniform cache architecture for reducing the power consumption of memory systems. The nonuniform cache allows having different associativity values (i.e.,...
Tohru Ishihara, Farzan Fallah
113
Voted
ISLPED
2010
ACM
165views Hardware» more  ISLPED 2010»
15 years 26 days ago
Dynamic workload characterization for power efficient scheduling on CMP systems
Runtime characteristics of individual threads (such as IPC, cache usage, etc.) are a critical factor in making efficient scheduling decisions in modern chip-multiprocessor systems...
Gaurav Dhiman, Vasileios Kontorinis, Dean M. Tulls...
IPPS
2010
IEEE
14 years 10 months ago
Profitability-based power allocation for speculative multithreaded systems
With the shrinking of transistors continuing to follow Moore's Law and the non-scalability of conventional outof-order processors, multi-core systems are becoming the design ...
Polychronis Xekalakis, Nikolas Ioannou, Salman Kha...
107
Voted
JSAC
2006
124views more  JSAC 2006»
15 years 18 days ago
A game-theoretic approach to energy-efficient power control in multicarrier CDMA systems
A game-theoretic model for studying power control in multicarrier code-division multiple-access systems is proposed. Power control is modeled as a noncooperative game in which each...
Farhad Meshkati, Mung Chiang, H. Vincent Poor, Stu...
109
Voted
ISSS
1999
IEEE
121views Hardware» more  ISSS 1999»
15 years 5 months ago
Event-Driven Power Management of Portable Systems
The policy optimization problem for dynamic power management has received considerable attention in the recent past. We formulate policy optimization as a constrained optimization...
Tajana Simunic, Giovanni De Micheli, Luca Benini