Sciweavers

228 search results - page 4 / 46
» Power management in external memory using PA-CDRAM
Sort
View
CGO
2005
IEEE
15 years 3 months ago
Compiler Managed Dynamic Instruction Placement in a Low-Power Code Cache
Modern embedded microprocessors use low power on-chip memories called scratch-pad memories to store frequently executed instructions and data. Unlike traditional caches, scratch-p...
Rajiv A. Ravindran, Pracheeti D. Nagarkar, Ganesh ...
DATE
2005
IEEE
121views Hardware» more  DATE 2005»
15 years 3 months ago
Joint Power Management of Memory and Disk
This paper presents a scheme to combine memory and power management for achieving better energy reduction. Our method periodically adjusts the size of physical memory and the time...
Le Cai, Yung-Hsiang Lu
CF
2010
ACM
15 years 1 months ago
Towards greener data centers with storage class memory: minimizing idle power waste through coarse-grain management in fine-grai
Studies have shown much of today’s data centers are over-provisioned and underutilized. Over-provisioning cannot be avoided as these centers must anticipate peak load with burst...
In Hwan Doh, Young Jin Kim, Jung Soo Park, Eunsam ...
DATE
2007
IEEE
155views Hardware» more  DATE 2007»
15 years 3 months ago
A novel technique to use scratch-pad memory for stack management
Extensive work has been done for optimal management of scratch-pad memory (SPM) all assuming that the SPM is assigned a fixed address space. The main target objects to be placed o...
Soyoung Park, Hae-woo Park, Soonhoi Ha
DSN
2008
IEEE
15 years 4 months ago
An integrated approach to resource pool management: Policies, efficiency and quality metrics
: The consolidation of multiple servers and their workloads aims to minimize the number of servers needed thereby enabling the efficient use of server and power resources. At the s...
Daniel Gmach, Jerry Rolia, Ludmila Cherkasova, Gui...