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» Power minimization for dynamic PLAs
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TMC
2010
250views more  TMC 2010»
14 years 8 months ago
Duty Cycle Control for Low-Power-Listening MAC Protocols
Energy efficiency is of the utmost importance in wireless sensor networks. The family of low-power-listening MAC protocols was proposed to reduce one form of energy dissipation...
Christophe J. Merlin, Wendi Beth Heinzelman
ICCAD
2005
IEEE
127views Hardware» more  ICCAD 2005»
15 years 6 months ago
Flip-flop insertion with shifted-phase clocks for FPGA power reduction
— Although the LUT (look-up table) size of FPGAs has been optimized for general applications, complicated designs may contain a large number of cascaded LUTs between flip-flops...
Hyeonmin Lim, Kyungsoo Lee, Youngjin Cho, Naehyuck...
ICRA
2005
IEEE
145views Robotics» more  ICRA 2005»
15 years 3 months ago
Energy-Saving 3-Step Velocity Control Algorithm for Battery-Powered Wheeled Mobile Robots
— Energy of Wheeled Mobile Robot (WMR) is usually supplied by batteries with finite energy. In order to extend run-time of battery-powered WMR, it is necessary to minimize the e...
Chong Hui Kim, Byung Kook Kim
DSN
2008
IEEE
15 years 4 months ago
Automatic security assessment of critical cyber-infrastructures
This research investigates the automation of security assessment of the static and dynamic properties of cyberinfrastructures, with emphasis on the electrical power grid. We descr...
Zahid Anwar, Ravinder Shankesi, Roy H. Campbell
DAC
2008
ACM
15 years 10 months ago
Automatic synthesis of clock gating logic with controlled netlist perturbation
Clock gating is the insertion of combinational logic along the clock path to prevent the unnecessary switching of registers and reduce dynamic power consumption. The conditions un...
Aaron P. Hurst