318 search results - page 38 / 64 » Power minimization for dynamic PLAs |
IPCCC
2006
IEEE
15 years 3 months ago
2006
IEEE
Low power has been considered as an important issue in instruction cache (I-cache) designs. Several studies have shown that the I-cache can be tuned to reduce power. These techniq...
DATE
2007
IEEE
15 years 4 months ago
2007
IEEE
In a parallel system with multiple CPUs, one of the key problems is to assign loop iterations to processors. This problem, known as the loop scheduling problem, has been studied i...
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INFOCOM
2012
IEEE
13 years 3 days ago
2012
IEEE
Abstract—The WiFi radio in smartphones consumes a significant portion of energy when active. To reduce the energy consumption, the Power Saving Mode was standardized in IEEE 802...
ISQED
2007
IEEE
15 years 4 months ago
2007
IEEE
— In the past, dynamic voltage and frequency scaling (DVFS) has been widely used for power and energy optimization in embedded system design. As thermal issues become increasingl...
FPGA
2006
ACM
15 years 1 months ago
2006
ACM
The development of Reed-Solomon (RS) codes has allowed for improved data transmission over a variety of communication media. Although Reed-Solomon decoding provides a powerful def...