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» Power minimization for dynamic PLAs
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ISLPED
2005
ACM
85views Hardware» more  ISLPED 2005»
15 years 3 months ago
A low-power crossroad switch architecture and its core placement for network-on-chip
As the number of cores on a chip increases, power consumed by the communication structures takes significant portion of the overall power-budget. The individual components of the...
Kuei-Chung Chang, Jih-Sheng Shen, Tien-Fu Chen
ALGORITHMICA
2011
14 years 1 months ago
Average Rate Speed Scaling
Speed scaling is a power management technique that involves dynamically changing the speed of a processor. This gives rise to dual-objective scheduling problems, where the operati...
Nikhil Bansal, David P. Bunde, Ho-Leung Chan, Kirk...
HPCC
2007
Springer
15 years 3 months ago
Parallel Genetic Algorithms for DVS Scheduling of Distributed Embedded Systems
Many of today’s embedded systems, such as wireless and portable devices rely heavily on the limited power supply. Therefore, energy efficiency becomes one of the major design con...
Man Lin, Chen Ding
NETCOOP
2007
Springer
15 years 3 months ago
Minimum Transmission Energy Trajectories for a Linear Pursuit Problem
In this paper we study a pursuit problem in the context of a wireless sensor network, where the pursuer (i.e., mobile sink) trying to capture a pursuee (i.e., tracked object), movi...
Attila Vidács, Jorma T. Virtamo
SENSYS
2003
ACM
15 years 2 months ago
Practical lazy scheduling in sensor networks
Experience has shown that the power consumption of sensors and other wireless computational devices is often dominated by their communication patterns. We present a practical real...
Ramana Rao Kompella, Alex C. Snoeren