318 search results - page 51 / 64 » Power minimization for dynamic PLAs |
DATE
2008
IEEE
15 years 4 months ago
2008
IEEE
With technology advances, the number of cores integrated on a chip and their speed of operation is increasing. This, in turn is leading to a significant increase in chip temperat...
58
Voted
CAL
2007
14 years 9 months ago
2007
—This paper studies the important interaction between parallelization and energy consumption in a parallelizable application. Given the ratio of serial and parallel portion in an...
TVLSI
2002
14 years 9 months ago
2002
The performance of many modern computer and communication systems is dictated by the latency of communication pipelines. At the same time, power/energy consumption is often another...
101
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ISLPED
2006
ACM
15 years 3 months ago
2006
ACM
As semiconductor manufacturing technology scales to smaller device sizes, the power consumption of clocked digital ICs begins to increase. Dynamic voltage and frequency scaling (D...
108
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CASES
2007
ACM
15 years 1 months ago
2007
ACM
We propose a technique which leverages configurable data caches to address the problem of cache interference in multitasking embedded systems. Data caches are often necessary to p...