318 search results - page 5 / 64 » Power minimization for dynamic PLAs |
EOR
2006
14 years 9 months ago
2006
This paper is concerned with workload minimization in re-entrant lines with exponential service times and preemptive control policies. Using a numerical algorithm called the power...
TVLSI
2008
14 years 9 months ago
2008
Abstract--A SMART repeater is proposed for driving capacitively-coupled, global-length on-chip interconnects that alters its drive strength dynamically to match the relative bit pa...
MICRO
2005
IEEE
15 years 3 months ago
2005
IEEE
Various architectural power reduction techniques have been proposed for on-chip caches in the last decade. In this paper, we first show that these power reduction techniques can b...
108
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ECRTS
2010
IEEE
14 years 10 months ago
2010
IEEE
Energy conservation is an important issue in the design of embedded systems. Dynamic Voltage Scaling (DVS) and Dynamic Power Management (DPM) are two widely used techniques for sav...
117
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EMSOFT
2008
Springer
14 years 10 months ago
2008
Springer
Dynamic Voltage Scaling (DVS) and Dynamic Power Management (DPM) are two popular techniques commonly employed to save energy in real-time embedded systems. DVS policies aim at red...