732 search results - page 119 / 147 » Power minimization using control generated clocks |
151
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IEEEPACT
2002
IEEE
15 years 6 months ago
2002
IEEE
Many modern embedded processors (esp. DSPs) support partitioned memory banks (also called X-Y memory or dual bank memory) along with parallel load/store instructions to achieve co...
135
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ISBI
2006
IEEE
16 years 2 months ago
2006
IEEE
We combine a pen and pressure-sensitive tablet input device, and a sketch-based user initialization process, with a general subdivisioncurve Snake to create an intuitive, fast, ac...
112
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RTSS
2003
IEEE
15 years 6 months ago
2003
IEEE
This paper presents a quantification of the timing effects that advanced processor features like data and instruction cache, pipelines, branch prediction units and out-oforder ex...
131
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CASES
2007
ACM
15 years 5 months ago
2007
ACM
We derive analytically, the performance optimal throttling curve for a processor under thermal constraints for a given task sequence. We found that keeping the chip temperature co...
MOBICOM
2009
ACM
15 years 7 months ago
2009
ACM
We consider the problem of efficient link-layer multicasting in wireless networks with switched beamforming antennas. The inherent tradeoff between multicasting and beamforming ...