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» Power optimization and management in embedded systems
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CCGRID
2008
IEEE
15 years 18 days ago
Using Probabilistic Characterization to Reduce Runtime Faults in HPC Systems
Abstract--The current trend in high performance computing is to aggregate ever larger numbers of processing and interconnection elements in order to achieve desired levels of compu...
Jim M. Brandt, Bert J. Debusschere, Ann C. Gentile...
CODES
2005
IEEE
15 years 4 months ago
Shift buffering technique for automatic code synthesis from synchronous dataflow graphs
This paper proposes a new efficient buffer management technique called shift buffering for automatic code synthesis from synchronous dataflow graphs (SDF). Two previous buffer man...
Hyunok Oh, Nikil D. Dutt, Soonhoi Ha
HICSS
2002
IEEE
136views Biometrics» more  HICSS 2002»
15 years 3 months ago
Automated Decision Technology for Network Design in Cellular Communication Systems
The location and configuration of transmission infrastructure for cellular communication networks is a complex engineering task involving many competing objectives. While minimis...
Stuart M. Allen, Steve Hurley, Roger M. Whitaker
MOBISYS
2007
ACM
15 years 10 months ago
Triage: balancing energy and quality of service in a microserver
The ease of deployment of battery-powered and mobile systems is pushing the network edge far from powered infrastructures. A primary challenge in building untethered systems is of...
Nilanjan Banerjee, Jacob Sorber, Mark D. Corner, S...
ICCD
2007
IEEE
105views Hardware» more  ICCD 2007»
15 years 2 months ago
Power-aware mapping for reconfigurable NoC architectures
A core mapping method for reconfigurable network-on-chip (NoC) architectures is presented in this paper. In most of the existing methods, mapping is carried out based on the traff...
Mehdi Modarressi, Hamid Sarbazi-Azad