82 search results - page 16 / 17 » Power reduction techniques for Dynamically Reconfigurable Pr... |
PLDI
2010
ACM
13 years 11 months ago
2010
ACM
Dynamic correctness checking tools (a.k.a. lifeguards) can detect a wide array of correctness issues, such as memory, security, and concurrency misbehavior, in unmodified executa...
IEEEPACT
2005
IEEE
13 years 12 months ago
2005
IEEE
This paper presents a novel compiler directed technique to reduce the register pressure and power of the register file by releasing registers early. The compiler identifies regi...
ICFP
2010
ACM
13 years 7 months ago
2010
ACM
Nested data-parallelism (NDP) is a declarative style for programming irregular parallel applications. NDP languages provide language features favoring the NDP style, efficient com...
DAC
2009
ACM
14 years 7 months ago
2009
ACM
Exponentially rising cooling/packaging costs due to high power density call for architectural and software-level thermal management. Dynamic thermal management (DTM) techniques co...
ISCA
2006
IEEE
14 years 11 days ago
2006
IEEE
Level one cache normally resides on a processor’s critical path, which determines the clock frequency. Directmapped caches exhibit fast access time but poor hit rates compared w...