82 search results - page 3 / 17 » Power reduction techniques for Dynamically Reconfigurable Pr... |
ICMCS
2005
IEEE
13 years 12 months ago
2005
IEEE
The software codec on mobile device introduces significant power consumption because the energy efficiency of general processor based system is much lower than that of the dedicat...
ICCAD
2003
IEEE
14 years 3 months ago
2003
IEEE
On-chip L1 and L2 caches represent a sizeable fraction of the total power consumption of microprocessors. In deep sub-micron technology, the subthreshold leakage power is becoming...
ICCAD
2004
IEEE
14 years 3 months ago
2004
IEEE
In this paper, we propose a new technique for the combined voltage scaling of processors and communication links, taking into account dynamic as well as leakage power consumption....
LCN
2002
IEEE
13 years 11 months ago
2002
IEEE
The combination of high-performance processing power and flexibility found in network processors (NPs) has made them a good solution for today’s packet processing needs. Similar...
ISLPED
2010
ACM
13 years 4 months ago
2010
ACM
In this paper, a novel thermal-aware dynamic placement planner for reconfigurable systems is presented, which targets transient temperature reduction. Rather than solving time-...