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» Power scalable processing using distributed arithmetic
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DATE
2009
IEEE
127views Hardware» more  DATE 2009»
15 years 4 months ago
Process variation aware thread mapping for Chip Multiprocessors
Abstract—With the increasing scaling of manufacturing technology, process variation is a phenomenon that has become more prevalent. As a result, in the context of Chip Multiproce...
Shengyan Hong, Sri Hari Krishna Narayanan, Mahmut ...
IPPS
2003
IEEE
15 years 3 months ago
Multi-Paradigm Framework for Parallel Image Processing
A software framework for the parallel execution of sequential programs using C++ classes is presented. The functional language Concurrent ML is used to implement the underlying ha...
David J. Johnston, Martin Fleury, Andy C. Downton
ISCAS
1994
IEEE
124views Hardware» more  ISCAS 1994»
15 years 1 months ago
Efficient Gabor Filter Design Using Rician Output Statistics
Gabor filters have been applied sucessfully to a broad range of multidimensional signal processing and image processing tasks. The present paper considers the design of a single f...
Thomas P. Weldon, William E. Higgins, Dennis F. Du...
PROCEDIA
2010
140views more  PROCEDIA 2010»
14 years 4 months ago
Theoretical enzyme design using the Kepler scientific workflows on the Grid
One of the greatest challenges in computational chemistry is the design of enzymes to catalyze non-natural chemical reactions. We focus on harnessing the distributed parallel comp...
Jianwu Wang, Prakashan Korambath, Seonah Kim, Scot...
CASES
2005
ACM
14 years 11 months ago
Exploring the design space of LUT-based transparent accelerators
Instruction set customization accelerates the performance of applications by compressing the length of critical dependence paths and reducing the demands on processor resources. W...
Sami Yehia, Nathan Clark, Scott A. Mahlke, Kriszti...