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» Power scalable processing using distributed arithmetic
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APPT
2009
Springer
15 years 1 months ago
Dealing with Traffic-Area Trade-Off in Direct Coherence Protocols for Many-Core CMPs
Abstract. In many-core CMP architectures, the cache coherence protocol is a key component since it can add requirements of area and power consumption to the final design and, there...
Alberto Ros, Manuel E. Acacio, José M. Garc...
ISADS
1999
IEEE
15 years 2 months ago
CORBA based Architecture for Large Scale Workflow
Standard client-server workflow management systems have an intrinsic scalability limitation, the central server, which represents a bottleneck for large-scale applications. This s...
Roberto Silveira Silva Filho, Jacques Wainer, Edmu...
FPGA
2011
ACM
330views FPGA» more  FPGA 2011»
14 years 1 months ago
CoRAM: an in-fabric memory architecture for FPGA-based computing
FPGAs have been used in many applications to achieve orders-of-magnitude improvement in absolute performance and energy efficiency relative to conventional microprocessors. Despit...
Eric S. Chung, James C. Hoe, Ken Mai
EWSA
2004
Springer
15 years 3 months ago
An Architecture Description Language for Mobile Distributed Systems
Mobile software applications have to meet new requirements directly arising from mobility issues. To address these requirements at an early stage in development, an architecture d...
Volker Gruhn, Clemens Schäfer
ICA
2007
Springer
15 years 4 months ago
Robust Independent Component Analysis Using Quadratic Negentropy
We present a robust algorithm for independent component analysis that uses the sum of marginal quadratic negentropies as a dependence measure. It can handle arbitrary source densit...
Jaehyung Lee, Taesu Kim, Soo-Young Lee