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ISCA
1996
IEEE
120views Hardware» more  ISCA 1996»
15 years 3 months ago
Missing the Memory Wall: The Case for Processor/Memory Integration
Current high performance computer systems use complex, large superscalar CPUs that interface to the main memory through a hierarchy of caches and interconnect systems. These CPU-c...
Ashley Saulsbury, Fong Pong, Andreas Nowatzyk
DATE
2006
IEEE
109views Hardware» more  DATE 2006»
15 years 5 months ago
A methodology for mapping multiple use-cases onto networks on chips
A communication-centric design approach, Networks on Chips (NoCs), has emerged as the design paradigm for designing a scalable communication infrastructure for future Systems on C...
Srinivasan Murali, Martijn Coenen, Andrei Radulesc...
DAC
2007
ACM
16 years 23 days ago
Off-chip Decoupling Capacitor Allocation for Chip Package Co-Design
Off-chip decoupling capacitor (decap) allocation is a demanding task during package and chip codesign. Existing approaches can not handle large numbers of I/O counts and large num...
Hao Yu, Chunta Chu, Lei He
AINA
2009
IEEE
15 years 4 months ago
Differences and Commonalities of Service-Oriented Device Architectures, Wireless Sensor Networks and Networks-on-Chip
Device centric Service-oriented Architectures have shown to be applicable in the automation industry for interconnecting manufacturing devices and enterprise systems, thus, establ...
Guido Moritz, Claas Cornelius, Frank Golatowski, D...
75
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MICRO
2006
IEEE
104views Hardware» more  MICRO 2006»
15 years 5 months ago
Leveraging Optical Technology in Future Bus-based Chip Multiprocessors
Although silicon optical technology is still in its formative stages, and the more near-term application is chip-to-chip communication, rapid advances have been made in the develo...
Nevin Kirman, Meyrem Kirman, Rajeev K. Dokania, Jo...